Field of the Invention
The present invention relates to a solid-state image pickup device and an image pickup apparatus.
Description of Related Art
In recent years, image pickup apparatuses such as video cameras or electronic still cameras have generally been in widespread use. Charge coupled device (CCD)-type solid-state image pickup devices or amplification-type solid-state image pickup devices are used in these image pickup apparatuses. In the amplification-type solid-state image pickup device, a signal charge generated and accumulated by a photoelectric conversion part on which light is incident is guided to an amplification part, and a plurality of pixels that output a signal amplified by this amplification part as a pixel signal are disposed in a two-dimensional matrix.
Examples of the amplification-type solid-state image pickup device include a solid-state image pickup device using a junction-type electric field effect transistor in an amplification part, a CMOS-type solid-state image pickup device (hereinafter, also simply referred to as a “solid-state image pickup device”) using a complementary metal oxide semiconductor (CMOS) transistor in an amplification part, and the like.
In addition, in recent years, the number of pixels included in the solid-state image pickup device has increased with an increase in the number of pixels and the image quality of the solid-state image pickup device. Consequently, a speed-up in readout of a pixel signal from each of the pixels included in the solid-state image pickup device has been required.
In general solid-state image pickup devices of the related art, a method of amplifying signal charge generated and accumulated by a photoelectric conversion part within each of pixels arrayed in a two-dimensional matrix, and sequentially reading out the signal charge for each row is adopted. For this reason, an increase in the number of pixels included in the solid-state image pickup device is accompanied with an increase in the number of transistors (selection parts) connected to one vertical signal line. Thereby, in the solid-state image pickup device, it takes a lot of time for the pixel signal which is read out for each row from each pixel to reach a column circuit provided for each column of the pixel, and increases power consumption. That is, an increase in the number of pixels included in the solid-state image pickup device increases the time taken to read out the pixel signal from the pixel to the column circuit, and increases the power consumption of the solid-state image pickup device.
In addition, in a case where a chip area is increased in accordance with an increase in the number of pixels included in the solid-state image pickup device, not only does a yield rate during the manufacturing of the solid-state image pickup device deteriorate, but also the capacity (wiring capacity) of the vertical signal line itself increases. This increase in the capacity of the vertical signal line leads to a tendency for the readout time of the pixel signal to be further lengthened. In addition, the power consumption of the solid-state image pickup device also increases.
It is considered that the size of the pixel is reduced to cope with an increase in the number of pixels of the solid-state image pickup device. In this case, it is possible to speed up the readout of pixel signals from a large number of pixels by increasing the current value of a pixel load current source corresponding to each pixel.
Incidentally, in a case where the current value of the pixel load current source corresponding to each pixel is increased, characteristics during the readout of the pixel signal to the vertical signal line cannot be secured without increasing the size of a transistor of the amplification part. However, in a pixel having a small size, an increase in the size of the transistor of the amplification part leads to the incapability of securing a size required for a photodiode which is a photoelectric conversion part formed within a pixel, and thus a dynamic range or linearity is not sufficiently obtained. For this reason, it is very difficult to achieve both a reduction in the size of the pixel for coping with an increase in the number of pixels of the solid-state image pickup device and a speed-up in readout of the pixel signal from each pixel.
As a technique for solving such problems, for example, Japanese Unexamined Patent Application, First Publication No. 2013-243781 discloses a method of reducing the number of transistors (amplification parts) connected to one vertical signal line by dividing pixels included in a solid-state image pickup device into a plurality of groups. In the technique disclosed in Japanese Unexamined Patent Application, First Publication No. 2013-243781, one vertical signal line of the related art is divided into two parts by dividing the pixels included in the solid-state image pickup device into two groups. A column circuit corresponding to each of the divided vertical signal lines is provided. That is, in the technique disclosed in Japanese Unexamined Patent Application, First Publication No. 2013-243781, a set of column circuits corresponding to each column of the pixels included in the solid-state image pickup device is provided by the number of groups into which the pixels within a pixel part are divided.
With such a configuration, in the technique disclosed in Japanese Unexamined Patent Application, First Publication No. 2013-243781, the number of transistors (amplification parts) connected to each vertical signal line is reduced to ½, that is, the load of the vertical signal line when a pixel signal is read out from each pixel to a column circuit is reduced, and thus the readout time of the pixel signal is shortened. In addition, in the technique disclosed in Japanese Unexamined Patent Application, First Publication No. 2013-243781, the pixel signals are read out from two groups in parallel, and thus a speed-up in readout of the pixel signal from each pixel is achieved.